Multiplying a normal IEEE floating-point number is equivalent to adding 1 to the exponent. Assume single precision and no overflow. The exponent is at the bit positions 30-23 in the word. The following sequence of instructions adds 1 to bit 23 (the least signicant bit of the exponent):
lw $t0, X($0) # load the word containing the f.p. number
addi $t1, $0, 1 # $t1 = 1
sll $t1, $t1, 23 # shift 1 to bit 23
addu $t0, $t0, $t1 # add 1 to bit 23 of $t0
sw $t0, X($0) # write the result back
In the above solution, we consider X as the label (address) of the floating-point number and X fits in 16 bits. If we treat X as a 32-bit address, then we have
lui $t0, X_upper
ori $t0, $t0, X_lower
lw $t0, 0($t0)
addi $t1, $0, 1 # $t1 = 1
sll $t1, $t1, 23 # shift 1 to bit 23
addu $t0, $t0, $t1 # add 1 to bit 23 of $t0
sw $t0, X($0) # write the result back
| a(i+1) | ai | a(i-1) | Operation | ai a(i-1)->[Operation 1], a(i+1) ai->[Operation 2] |
| 0 | 0 | 0 | nop, >>2 | 0 0->[nop, >>1], 0 0->[nop, >> 1] |
| 0 | 0 | 1 | add mulcnd, >>2 | 0 1->[add, >>1], 0 0->[nop, >> 1] |
| 0 | 1 | 0 | -mulcnd+2mulcnd=add mulcnd, >>2 | 1 0->[sub, >>1], 0 1->[add, >> 1] |
| 0 | 1 | 1 | add 2mulcnd, >>2 | 1 1->[nop, >>1], 0 1->[add, >> 1] |
| 1 | 0 | 0 | sub 2mulcnd, >>2 | 0 0->[nop, >>1], 1 0->[sub, >> 1] |
| 1 | 0 | 1 | +mulcnd-2mulcn=sub mulcnd, >>2 | 0 1->[add, >>1], 1 0->[sub, >> 1] |
| 1 | 1 | 0 | sub mulcnd, >>2 | 1 0->[sub, >>1], 1 1->[nop, >> 1] |
| 1 | 1 | 1 | nop, >>2 | 1 1->[nop, >>1], 1 1->[nop, >> 1] |
Reason: a = SUM_{i=0}^{n-2} step 2, (-2*a(i+1) + a(i) + a(i-1))*2^i
The adder and the product register should be 1 bit wider to acommodate 2*mulcnd or -2*mulcnd.
Example. (-7)x(-21), binary: 111001 x 101011
-mulcnd = 010101, 2*mulcnd
= 1010110, -2*mulcnd = 0101010 (7 bits)
P A comments
0000000 111001
1101011 010, +mulcnd
1101011 111001
1111010 1111100 >>2
0101010 100, -2*mulcnd
0100100 1111100
0001001 0011111 >>2
0000010 010011 111 >>2
result: 010010011 (binary) = 147
With guard and round digits
1.4700 x 10^2 + 0.8760 x 10^2 = 2.3460 x 10^2 = 2.35 x 10^2
gr gr gr
Without guard and round digits
1.47 x 10^2 + 0.87 x 10^2 = 2.34 x 10^2
1. Expand the RegDst Mux to contain 31 as an input, expand RegDst from 1 bit to 2 bits.
2. Expand the MemtoReg Mux to contain PC as an input, expand MemtoReg Mux from 1 bit to 2 bits.
We can use the data path for 'jump' which is already implemented.
Control signals for jal:
RegDst ALUSrc MemtoReg RegWrite MemRead MemWrite jump branch ALUOp 10 x 10 1 0 0 1 x xx
You are required to show the modifications on the Figure.
For instruction 'jal', we need add one product term called "jal" (op code 3) in Figure C.5:
(not Op5) AND (not Op4) AND (not Op3) AND (not Op2) AND (Op1) AND (Op0)
Modify the OR gates:
R-format = RegDst0
jal = RegDst1
lw = MemtoReg0
jal = MemtoReg1
(R-format) OR (lw) OR (jal) = RegWrite